Synplicity Integrates MultiPoint Technology, Interactive Timing Analysis Into Next-Generation FPGA Synthesis Product

SUNNYVALE, Calif.--(BUSINESS WIRE)--Nov. 4, 2002-- Synplicity, Inc. (Nasdaq:SYNP), a leading supplier of software for the design and verification of semiconductors, today announced it has enhanced its Synplify Pro® FPGA synthesis software to further address the critical challenges confronting designers of highly complex programmable logic devices (PLDs). With the addition of Synplicity's MultiPoint(TM) technology and sophisticated timing analysis capabilities, the Synplify Pro software will provide improved performance and quality of results (QoR) when creating programmable system-on-a-chip (PSoC) devices and complex FPGAs.

As FPGA vendors incorporate more functionality and capacity onto a single device, designers require more robust software to accomplish design goals. Recognizing this demand, Synplicity, the FPGA synthesis market leader, extended its MultiPoint technology, including its unique difference-based incremental design methodology, to its Synplify Pro software, delivering a scalable synthesis solution for current and emerging designs. In addition, Synplicity added interactive timing analysis capabilities that enable designers to quickly and accurately analyze critical paths in a design without re-synthesis. Synplicity also added support for formal verification tools as well as new and enhanced support for leading programmable logic devices in efforts to improve overall designer productivity and device performance.

"We are committed to maintaining our leadership position in the FPGA synthesis market by delivering products that directly address the design challenges our customers are facing," said Jeff Garrison, director of marketing, Synplicity. "Emerging PSoC designs include capabilities such as high-speed I/Os, embedded processors, and offer up to 10 million gate capacities, requiring a powerful synthesis flow that is both fast and easy to use. We believe our MultiPoint technology and new interactive timing analysis capabilities within the Synplify Pro software offer a solution to these emerging challenges and provide designers with the capability to design the most complex device while maximizing performance."

MultiPoint Synthesis Methodology for Complex Designs

With support for the MultiPoint synthesis technology within the Synplify Pro software, Synplicity delivers an intelligent incremental design flow that provides excellent quality of results for complex programmable logic devices. The MultiPoint technology enables a unique difference-based incremental synthesis approach. This eliminates the need for re-synthesis which is common with time-stamp-based incremental flows, by only re-synthesizing design entities that will have a different gate-level netlist due to code or constraint changes. Further improving productivity, the Synplify Pro software's MultiPoint flow offers support for designers using the Xilinx ISE Incremental Design Flow and the Altera LogicLock(TM) feature within the Quartus® II design software.

"The Synplify Pro software complements the LogicLock block-based design methodology within our Quartus II design software, allowing our customers to lock-in the performance of each design block individually," said Tim Southgate, vice president of software and tools marketing at Altera Corporation. "Our customers designing with the Synplify Pro software should see superior device performance for the industry-leading Stratix device family."

Timing Analysis Capabilities Improve Device Performance

The Synplify Pro 7.2 software includes advanced timing analysis capabilities integrated into its HDL Analyst® software, enabling designers to identify critical paths quickly and perform fast, interactive timing analysis without re-synthesizing their design. The new timing analysis feature allows users to incrementally specify "from-to" paths in their circuit for instant detailed analysis saving time and improving productivity.

Rich Sevcik, senior vice president of FPGA products at Xilinx, said, "The Synplicity MultiPoint technology and Xilinx ISE 5.1i incremental design methodology were conceived with the same goals in mind, with foremost to reduce project development costs by shortening development time. Most large designs today, like those using the Virtex-II Pro require a module level iterative design process and this methodology greatly facilitates faster turns. Xilinx was the first to bring the incremental design methodology to FPGAs and with our latest innovation of faster verification through hierarchy retention, the Synplicity MultiPoint technology gives the industry's best front to back solution."

Support for Formal Verification and Leading Device Families

As designs become more complex and time-to-market pressures grow, formal verification tools are gaining in popularity among leading-edge FPGA designers. In this new version, the Synplify Pro software uniquely offers a mode of operation that is compatible with the Verplex Conformal LEC (Logical Equivalency Checker) tool. Synplicity and Verplex have established an optimized programmable logic design flow, providing designers with a fast, highly integrated solution for verifying designs created by Synplicity's Synplify Pro software using Verplex's Conformal product.

The software also features quality of results (QoR) enhancements such as improved RAM performance for Xilinx's Virtex II and Virtex II Pro devices, multiply-accumulate (MAC) mapping enhancements for Altera's Stratix(TM) devices, improving performance for DSP designers and improved mapping for Actel's ProASIC Plus family of devices. The Synplify software also offers new support for recently announced devices such as Actel's Axcelerator and Altera's Cyclone(TM) and Stratix GX device families.

Behavior Extracting Synthesis Technology® Drives Industry-Leading Products

Driven by the proprietary Behavior Extracting Synthesis Technology (BEST(TM)) algorithms, Synplicity's synthesis solutions can deliver optimal circuit performance with the most efficient area utilization. The Synplify product's BEST technology extracts designer intent from HDL code by inferring complex memories, finite state machines (FSMs) and advanced mathematical functions, then efficiently maps them to device-specific hardware resources. The software utilizes a high-capacity timing analysis engine that makes accurate timing estimations to produce highly optimized circuits with fewer design iterations.

Pricing and Availability

The Synplify® 7.2 and Synplify Pro 7.2 synthesis solutions are currently in testing. Pricing for the Synplify software starts at $9,500 (U.S.) and pricing for Synplify Pro software starts at $20,000 (U.S.).

About Synplicity

Synplicity, Inc. (Nasdaq:SYNP) is a leading provider of software products that enable the rapid and effective design and verification of semiconductors used in networking and communications, computer and peripheral, consumer and military/aerospace electronics systems. Recognizing the company's industry-leading position, Dataquest named Synplicity as the #1 provider of PLD synthesis tools in 2000, the latest year for which information is available, with a 45 percent market share. Synplicity leverages its innovative logic synthesis, physical synthesis and verification software solutions to improve performance and shorten development time for complex programmable logic devices, application specific integrated circuits (ASICs) and system-on-chip (SoC) integrated circuits. The company's fast, easy-to-use products offer high quality of results, support industry-standard design languages (VHDL and Verilog) and run on popular platforms. As of September 30, 2002, Synplicity employed 269 people in its 20 facilities worldwide. Synplicity is headquartered in Sunnyvale, Calif. For more information on Synplicity, visit http://www.synplicity.com.

The specific features, functionality and release timing of any new technology or new versions of current products as described in this press release remain at the sole discretion of Synplicity, Inc., and Synplicity does not make any warranty as to when or if such specific features, functionality or releases may occur.

Synplicity, HDL Analyst, Behavior Extracting Synthesis Technology, Synplify and Synplify Pro are registered trademarks of Synplicity, Inc. BEST is a trademark of Synplicity, Inc. All other brands or products are the trademarks or registered trademarks of their respective owners.

     Synplicity, Inc.
     Jeff Garrison, 408/215-6000
     jeff@synplicity.com
        or
     Porter Novelli
     Steve Gabriel, 408/369-1500
     steve.gabriel@porternovelli.com